1. Field of the Invention
The present invention relates to a voltage regulator and more particularly, to a voltage regulator capable of lowering a voltage applied across a phase compensating capacitor.
2. Description of the Prior Art
First, a conventional example of a generally and widely used voltage regulator shown in FIG. 6 will be explained.
The voltage regulator of FIG. 6 comprises: reference voltage source 4, to which power is supplied from input terminal 1, and which generates a reference voltage at output terminal 41; error amplifier 5 having a non-inverting input terminal to which the reference voltage is applied; output transistor N1 consisting of an N-channel MOS transistor which has a drain connected to input terminal 1, a gate connected to output terminal 51 of error amplifier 5 and a source connected to output terminal 3; resistors R1 and R2, connected in series between output terminal 3 and ground terminal 2, whose cross point is connected to an inverting input terminal of error amplifier 5; and phase compensating capacitor C10 having one end portion connected to output terminal 51 and the other end portion connected to ground terminal 2.
Output voltage Vout at output terminal 3 is, based on reference voltage Vr which appears at the output terminal of reference voltage source 4, represented by the following equation (1): EQU Vout=(1+R1/R2).multidot.Vr (1)
wherein R1 and R2 stand for resistance values of resistors R1 and R2, respectively. Error amplifier 5 controls a gate voltage of transistor N1 so that a voltage at the cross point of resistors R1 and R2 becomes equal to reference voltage Vr.
In general, phase compensating capacitor C10 comprises a so-called MOS capacitor which has a capacitor insulating film consisting of an oxide film with a small bias voltage dependence and less leak current. Capacitance Cox of the MOS capacitor is represented by the following equation (2): EQU Cox=.epsilon.ox.multidot..epsilon.0/Tox (2)
wherein .epsilon. ox stands for a relative permittivity of the oxide film, .epsilon. 0 stands for a permittivity in a vacuum (=8.854.times.10.sup.-14 F/cm), and Tox denotes a thickness of the oxide film. From the equation (2), it is apparent that the thinner the thickness Tox of the oxide film, the larger the capacity value per unit area.
When output voltage Vout is equal to 15V, a voltage composed of 15V and gate-source voltage Vgs(N1) of output transistor N1 added thereto is applied to a high potential side of phase compensating capacitor C10. Therefore, if a gate oxide film of the MOS transistor is used as the oxide film of MOS capacitor C10, an electric field of (15V+Vgs(N1))/Tox is applied across the gate oxide film which forms MOS capacitor C10.
If Vgs(N1)=0.6V and Tox=10 nm (nanometer), an electric field of 15.6 V/10 nm is generated across MOS capacitor C10. The electric field is equal to, or more than three times the breakdown electric field intensity, 5/10 nm, of the 10 nm thick oxide film. Thus, the gate oxide film having a large capacity per unit area can not be used as the oxide film of MOS capacitor C10.
Because of the above reason, there is a disadvantage that a thick oxide film such as a field oxide film must be used for the oxide film in phase compensating capacitor C10 and the capacity value per unit area becomes small, whereby an area of the MOS capacitor becomes large.
With respect to an operational amplifier which comprises a phase compensating circuit consisting of a capacitor and a MOS transistor, and a voltage generating circuit for applying a constant voltage to a gate of the MOS transistor, a technique disclosed in JPA 07-106871 may be referred. Phase compensating circuit 65 and voltage generating circuit 72 which configure the operational amplifier explained in the above publication will be explained with reference to FIG. 7.
Phase compensating circuit 65 shown in FIG. 7 consists of capacitor C11 whose one end portion is connected to output terminal 30 of the operational amplifier, and N-channel MOS transistor N15 whose drain is connected to the other end portion of capacitor C11 and whose gate is connected to output terminal 14 of voltage generating circuit 72.
Voltage generating circuit 72 consists of P-channel MOS transistor P5 whose source is connected to supply terminal 1a and whose gate and drain are connected in common to one end portion of resistor R4, and resistor R4 whose the other end portion is connected to the ground terminal.
When the output voltage of output terminal 30 is equal to 15V similarly to the above-explained case, the voltage of 15V is applied to the high potential side of phase compensating capacitor C11. On the other hand, the low potential side of phase compensating capacitor C11, which is connected to the gate of N-channel MOS transistor N6 through an ON-resistance of N-channel MOS transistor N15, has a voltage of about 0.6V.
Therefore, as a voltage of approximately 15V-0.6V=14.4V is applied across capacitor C11, the MOS capacitor formed with the gate oxide film having the large capacitance value per unit area cannot be used. As a result, there is a disadvantage that an area of capacitor C11 becomes large.
In the aforementioned conventional voltage regulator and operational amplifier, because of the high voltage applied to the MOS capacitor for the use of phase compensation, the gate oxide film with a large capacitance value per unit area can not be used for the oxide film of the MOS capacitor. Therefore, there is a disadvantage that the thick oxide film such as the field oxide film must be used for the oxide film, the area size of the MOS capacitor becomes large, and the area size of the voltage regulator which contains the phase compensating circuit therein also becomes large.